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TB62201AFG 2005-04-04 1 toshiba bi-cmos processor ic silicon monolithic TB62201AFG dual-stepping motor driv er ic for oa equipment using pwm chopper type the TB62201AFG is a dual-steppi ng motor driver driven by chopper micro-step pseudo sine wave. to drive two-phase stepping moto rs, two pairs of 16-bit latch and shift registers are built in the ic . the ic is optimal for driving stepping motors at high efficien cy and with low-torque ripple. the ic supports mixed decay mode for switching the attenuation ratio at chopping. the switching time for the attenuation ratio can be switched in four stages according to the load. features z two stepping motors driven by micro-step pseudo sine wave are controlled by a single driver ic z monolithic bi-cmos ic z low on-resistance of ron = 0.5 ? (t j = 25c @ 1.0 a: typ.) z esd protection exceeds 2000 v, mil-std-883d z two pairs of built-in 16-bit shift and latch registers z two pairs of built-in 4-bit da converters for micro steps z built-in isd, tsd, v dd &v m power monitor (reset) circuit for protection z built-in charge pump circuit (two external capacitors) z 36-pin power flat package (hsop36-p-450-0.65) z output voltage: 40 v max z output current: 1.5 a/phase max z built-in mixed decay mode enables specific ation of four-stage attenuation ratio. (the attenuation ratio table can be overwritten externally.) z chopping frequency can be set by external resistors and capacitors. high-speed chopping possible at 100 khz or higher. note: when using the ic, pay attention to thermal conditions. these devices are easy dama ge by high static voltage. in regards to this, please handle with care. weight: 0.79 g (typ.)
TB62201AFG 2005-04-04 2 block diagram 1. overview (power lines: a/b unit (c/d unit is the same as a/b unit)) current feedback circuit protected circuit tsd circuit v ddr /v mr circuit ? current setting mixed decay timing, table logic circuit 4-bit d/a (angle control) torque control r s comp circuit 1 ? output control circuit stepping motor 16-bit shift register cr high-voltage wiring (v m ) logic data analog data ic terminal v ref ? r s ? v m ? data ? charge pump circuit output circuit (h-bridge) chopping waveform generator circuit wavefo r m shaping circuit chopping reference circuit ? reset ? 16-bit latch mixed decay timing table selector 16-bit latch 16-bit shift register current control data logic circuit ? data input selector setup ? clk ? strobe ? r s comp circuit 2 ? v rs circuit 1 ? v rs circuit 2 ? c cp1 ? c cp2 ? v m ? isd circuit v dd ? out x ?
TB62201AFG 2005-04-04 3 2. logic unit a/b (c/d unit is the same as a/b unit) function this circuit is used to input from the data pins micro -step current setting data and to transfer them to the subsequent stage. by switching the setup pin, th e data in the mixed decay timing table can be overwritten. note: the reset and setup pins are pulled down in the ic by 10 k ? resistor. when not using these pins, connect them to gnd. otherwise, malfunction may occur. initial setup circuit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 mixed decay timing table 1 mixed decay timing t able logic circuit mixed decay timing table 2 mixed decay timing table 3 mixed decay timing table 4 mixed decay timing table selector 16-bit latch mixed decay timing output control circuit 16-bit shift register current feedback circ uit d/a circuit torque 2 bits decay 2 bits b unit side current 4 bits b unit side phase 1 bit b unit side output control circuit clk strobe data reset setup data input selector 16-bit shift register 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16-bit latch a unit side micro-step current setti ng data logic circuit
TB62201AFG 2005-04-04 4 3. current feedback circuit and current setting circuit (a/b unit (c/d unit is the same as a/b unit)) function the current setting circuit is used to set the refere nce voltage of the output current using the micro-step current setting data input from the data pins. the current feedback circuit is used to output to th e output control circuit the relation between the set current value and output current. this is done by comparing the reference voltage output to the current setting circuit with the potential difference generated when current flows through the current sense resistor connected between rs and v m . the chopping waveform generator circuit to which cr is connected is used to generate clock used as reference for the chopping frequency. note 1: rs comp 1: compares the set current with t he output current and outputs a si gnal when the output current reaches the set current. note 2: rs comp 2: compares the set current with t he output current at the end of fast mode during chopping. outputs a signal when the set cu rrent is below the output current. 100% 85% 70% 50% cr v rs circuit 1 (detects potential difference between r s and v m ) r s comp circuit 1 (note 1) nf (set current reached signal) v rs circuit 2 (detects potential difference between v m and r s ) r s comp circuit 2 (note 2) rnf (set current monitor signal) use in fast mode use in charge mode output control circuit mixed decay timing circuit output stop signal (all off) chopping reference circuit current feedback circuit torque ? control circuit current setting circuit torque 0, 1 current 0 to 3 logic unit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 micro-step current setting selector circuit 4-bit d/a circuit v m r s v ref waveform shaping circuit ng wavefor m generat or circuit
TB62201AFG 2005-04-04 5 4. output control circuit, current feedback circuit and current setting circuit (a/b unit (c/d unit is the same as a/b unit)) note: the reset pins is pulled down in the ic by 10-k ? resistor. when not using the pin, connect it to gnd. otherwise, malfunction may occur. isd (current shutdown) circuit output pin v mr circuit v m v ddr circuit v dd thermal shut down (tsd) circuit charge pump circuit ccp a v dd v m logic v ddr : v dd power on reset v mr : v m power on reset isd: current shutdown circuit tsd: thermal shutdown circuit protection circuit charge pump circuit micro-step current setup latch clear signal mixed decay timing table clear signal ccp b ccp c output reset signal output circuit charge pump halt signal power suppl y for upper output mos transistors v h reset signal selector circuit current feedback circuit current setting circuit cr counter cr counter chopping reference circuit micro-step current setting data logic circuit output control circuit phase decay mode mixed decay timing circuit output circuit output stop signal mixed decay timing charge start u 1 u 2 l 1 l 2 reset nf set current reached signal rnf set current monitor signal output control circuit
TB62201AFG 2005-04-04 6 5. output equivalent circuit (a/b unit (c/d unit is the same as a/b unit)) output b v m b u 1 l 1 u 2 l 2 to v m from output control circuit output a r s a r rs a m u 1 l 1 u 2 l 2 pgnd from output control circuit output b r rs b output driver circuit power supply for upper output mos transistors (v h ) phase a output driver circuit power supply for upper output mos transistors (v h ) phase b r s b u 1 u 2 l 1 l 2 u 1 u 2 l 1 l 2 output a
TB62201AFG 2005-04-04 7 6. input equivalent circuit (1) logic input circuit (clk, data, strobe) (2) input circuit (setup, reset ) (3) v ref input circuit note: the setup and reset pins are pulled down. do not use them open. when not using these pins, connect them to gnd. v dd 27 30/29/31 25/26/24 f in 150 ? to logic ic in gnd 10 k ? v dd 27 6/28 f in 150 ? to logic ic in gnd v dd 27 in to d/a circuit 4 f in gnd 9/10
TB62201AFG 2005-04-04 8 pin assignment note: [important] if this ic is inserted reverse, voltages exceeding the voltages of standard may be applied to some pins, causing damage. please confirm the pin assignment before mounting and using the ic. v m b out b r s b pgnd out b setup ccp a cr v ref ab v ss (f in ) v ref cd nc ccp b ccp c out d pgnd r s d out d v md 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 25 24 23 22 21 20 19 TB62201AFG 32 31 30 29 28 26 27 18 36 35 34 33 (top view) v m a out a r s a pgnd out a strobe ab clk ab data ab reset v ss (f in ) v dd data cd clk cd strobe cd out c pgnd r s c out c v mc
TB62201AFG 2005-04-04 9 pin description pin no. pin symbol description 1 v m b voltage major for output b block 2 out b output b pin 3 r s b channel b current pin 4 pgnd power gnd pin 5 b out output b pin 6 setup cr setup switching pin (l: normal, h: setup) 7 c cp a capacitor pin for charge pump (ccp1) 8 cr external c/r (osc) pin (sets chopping frequency) 9 v ref ab v ref input pin ab f in v ss f in (v ss ): logic gnd pin 10 v ref cd vref input pin cd 11 nc non conection 12 c cp b capacitor pin for charge pump (ccp2) 13 c cp c capacitor pin for charge pump (ccp2) 14 d out output d pin 15 pgnd power gnd pin 16 r s d channel d current pin 17 out d output d pin 18 v m d voltage major for output d block 19 v m c voltage major for output c block 20 c out output c pin 21 r s c channel c current pin 22 pgnd power gnd pin 23 out c output c pin 24 strobe cd cd strobe (latch) signal input pin ( : latch) 25 clk cd cd clock input pin 26 data cd cd serial data signal input pin 27 v dd power pin for logic block f in v ss f in (v ss ) : logic gnd pin 28 reset output reset signal input pin (l: reset) 29 data ab ab serial data signal input pin 30 clk ab ab clock input pin 31 strobe ab ab strobe (latch) signal input pin ( : latch) 32 out a output a pin 33 pgnd power gnd pin 34 r s a channel a current pin 35 a out output a pin 36 v m a voltage major for output a block note: how to handle gnd pins all power gnd pins and fin (v ss : signal gnd) pins must be grounded. since fin also functions as a heat sink, take the heat dissipation into considerat ion when designing the board.
TB62201AFG 2005-04-04 10 signal functions 1. serial input signals (for a/b. c/d is the same as a/b) data no. name functions 0 lsb torque 0 1 torque 1 data no.0, 1 = hh: 100%, lh: 85% hl: 70%, ll: 50% 2 decay mode b 0 3 decay mode b 1 00: decay mode 0, 01: decay mode 1 10: decay mode 2, 11: decay mode 3 4 current b 0 5 current b 1 6 current b 2 7 current b 3 used for setting current. (llll = output all off mode) 4-bit current b data (steps can be divided into 16 by 4-bit data) 8 phase b phase information (h: out a: h, out a: l) 9 decay mode a 0 10 decay mode a 1 00: decay mode 0, 01: decay mode 1 10: decay mode 2, 11: decay mode 3 11 current a 0 12 current a 1 13 current a 2 14 current a 3 used for setting current. (llll = output all off mode) 4-bit current a data (steps can be divided into 16 by 4-bit data) 15 msb phase a phase information (h: out a: h, out a : l) note 1: serial data input order serial data are input in the order lsb (data 0) msb (data 15) role of data data name number of bits functions torque 2 roughly regulates the current (four stages). common to a and b units. decay mode 2 2 phases selects decay mode. a and b units are set separately. current 4 2 phases sets a 4 ? bit micro ? step electrical angle. a and b units are set separately. phase 1 2 phases determines polarity ( + or ? ). a and b units are set separately. (note 1)
TB62201AFG 2005-04-04 11 2. serial input signal functions input action clk strobe data reset vddr (note 2) or v mr operation of tsd/isd (note 2) h h l no change in shift register. h h h l h level is input to shift register. l h h l l level is input to shift register. h h l shift register data are latched. h h l qn l l output off, charge pump halted (s/r data clr) l l output off (s/r data clr) charge pump halted mixed decay timing table cleared (only v ddr ) h h h output off (s/r data hold) charge pump halted restored when reset goes from low to high : don?t care qn: latched output level when strobe is . note 1: v ddr and v mr h when the operable range (3 v typical) or higher and l when lower. when one of v ddr or v mr is operating, the system resets (or relationship). note 2: high when tsd is in operation. when one of tsd or isd is operating, the system resets (or relationship). note: function of overcurrent protection circuit until the reset signal is input after isd is triggered, the overcurrent protection circuit remains in operation. during isd, the charge pump stays halted. when tsd and isd are operating, the charge pump halts. 3. phase functions input function h positive polarity (a: h, : l) l negative polarity (a: l, : h)
TB62201AFG 2005-04-04 12 4. decay mode x0, x1 functions decay mode x1 decay mode x0 function l l decay mode 0 (initial value: slow decay mode) l h decay mode 1 (initial value: mixed decay mode: 37.5%) h l decay mode 2 (initial value: mixed decay mode: 75%) h h decay mode 3 (initial value: fast decay mode) 5. torque functions torque 0 torque 1 comparator reference voltage ratio h h 100% l h 85% h l 70% l l 50% 6. current ax (bx) functions step set angle a 3 a 2 a 1 a 0 b 3 b 2 b 1 b 0 16 90.0 h h h h l l l l 15 84.4 h h h h l l l h 14 78.8 h h h l l l h l 13 73.1 h h l h l l h h 12 67.5 h h l l l h l l 11 61.2 h l h h l h l h 10 56.3 h l h l l h h l 9 50.6 h l l h l h h h 8 45.0 h l l l h l l l 7 39.4 l h h h h l l h 6 33.8 l h h l h l h l 5 28.1 l h l h h l h h 4 22.5 l h l l h h l l 3 16.9 l l h h h h l h 2 11.3 l l h l h h h l 1 5.6 l l l h h h h h 0 0.0 l l l l h h h h by inputting the above current data (a: 4-bit, b: 4-bit), 17-microstep drive is possible. for 1 step fixed to 90 degrees, see the section on output current vector line (83 page).
TB62201AFG 2005-04-04 13 7. setup functions input function h decay timing data input mode l normal operating mode note: the setup pin is pulled down in the ic by 10-k ? resistor. 8. serial data input setting (normal operation) setup pin: l note: data input to the data pin are 16-bit serial data. data are transferred from data 0 (torque 0) to data 15 (phase a). data are input and transferred at the following timings. at clk falling edge: data input at clk rising edge: data transfer after data are transferred, all data are latc hed on the rising edge of the strobe signal. as long as strobe is not rising, the signal c an be either low or high during data transfer. 9. serial data input setting (decay timing setup) setup pin: h note: data input to the data pin are 16-bit serial data. ? data are transferred from data 0 (current mode 1) to data 15 (decay mode x-4). data are input and transferred at the following timings. ? at clk falling edge: data input ? at clk rising edge: data transfer ? after data are transferred, all data are latc hed on the rising edge of the strobe signal. as long as strobe is not rising, the signal c an be either low or high during data transfer. data 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 clk strobe data 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 clk strobe
TB62201AFG 2005-04-04 14 10. conditions on overwriting mixed decay timing table if the following conditions are satisf ied, the table can be overwritten. ? when reset = h (when reset = l, the shift register is cleare d, thus data cannot be input) ? when an internal reset is not triggered. 1) when the temperature is such that tsd is not triggered (or not reset by tsd). 2) under a condition where isd is not triggered (or not reset by isd). 3) both v dd and v m are within the operating voltage. note 1: while the output transistors are operating, do not rewrite the values in the mixed decay timing table. note 2: the setup pins is pulled down in the ic by 10-k ? resistor when not using the pin, connect it to gnd. otherwise, malfunction may occur. 11. data input signal at setting mixed decay timing table data no. name function initial value 15 msb current mode 3 selects slow or mixed decay mode 1 : mixed decay mode 14 decay mode 3-2 sets decay 3 ratio (decay 3 raito) 1 13 decay mode 3-1 1 12 decay mode 3-0 1 : 100% : fast decay mode 11 current mode 2 selects slow or mixed decay mode 1 : mixed decay mode 10 decay mode 2-2 sets decay 2 ratio 1 9 decay mode 2-1 0 8 decay mode 2-0 1 : 75% mixed decay 7 current mode 1 selects slow or mixed decay mode 1 : mixed decay mode 6 decay mode 1-2 sets decay 1 ratio 0 5 decay mode 1-1 1 4 decay mode 1-0 0 : 37.5% mixed decay 3 current mode 0 selects slow or mixed decay mode 0 : slow decay mode 2 decay mode 0-2 sets decay 0 ratio 0 1 decay mode 0-1 0 0 lsb decay mode 0-0 0 (slow decay mode) note 1: input order of serial data when setting decay timing, first input h to the set up pin, the same as for ordinary data, then input data from lsb (data 0) to msb (data 15). when power is first turned on, the initial va lues in the table above are set as defaults. once latched, data are not cleared except by vddr (power-on and power-off reset). next, after the mode changes to setup, the data are retained until mixed decay timing data are input and latched.
TB62201AFG 2005-04-04 15 12. function of setting mixed decay timing current mode x decay mode x-2 decay mode x-1 decay mode x-0 mixed decay timing l don?t care don?t care don?t care 0% (slow decay mode) h l l l 12.5% h l l h 25.0% h l h l 37.5% h l h h 50.0% h h l l 62.5% h h l h 75.0% h h h l 87.5% h h h h 100% (fast decay mode) mixed decay timing means the time for switching slow mode to fast mode in mixed decay mode. in mixed decay mode, the fast mode time at the end of chopping cycle (t chop ) is fixed by data. the ic is switched from slow to fast mode according to the percentage representing mode time in the table above. (for example, 12.5% means that 12.5% of the time is in fast mode and the rest of the time, 87.5%, in charge and slow modes.) only when the value is maximum (100%), the mode is fast decay mode.
TB62201AFG 2005-04-04 16 maximum ratings (ta = 25c) characteristics symbol rating unit logic supply voltage v dd 7 v output voltage v m 40 v output current i out 1.5 a/phase (note 1) current detect pin voltage v rs v m 4.5 v charge pump pin maximum voltage (ccp1 pin) v h v m + 7.0 v logic input voltage v in to v dd + 0.4 v 1.4 w (note 2) power dissipation p d 3.2 w (note 3) operating temperature t opr ? 40 to 85 c storage temperature t stg ? 50 to 150 c junction temperature t j 150 c note 1: perform thermal calculations for the maximum current value under norma l conditions. use the ic at 1.2 a or less per phase. note 2: input 7 v or less as v in . note 3: measured for the ic only. (ta = 25c) note 4: measured when mounted on the board. (ta = 25c) ta: ic ambient temperature t opr : ic ambient temperature when starting operation t j : ic chip temperature during operation t j (max) is controlled by tsd (thermal shut down circuit) recommended operating conditions (ta = 0 to 85c) characteristics symbol test condition min typ. max unit power supply voltage v dd ? 4.5 5.0 5.5 v output voltage v m v dd = 5.0 v 20 24 34 v i out (1) ta = 25c, per phase (when one motor is driven) ? 1.1 1.3 a output current i out (2) ta = 25c, per phase (when two motors are driven) ? 1.1 1.3 a logic input voltage v in ? gnd ? v dd v clock frequency f clk v dd = 5.0 v 1.0 6.25 25 mhz chopping frequency f chop v dd = 5.0 v 40 100 150 khz reference voltage v ref v m = 24 v, t orque = 100% 2.0 3.0 v dd v current detect pin voltage v rs v dd = 5.0 v 0 1.0 1.5 v note: use the maximum junction temperature (t j ) at 120c or less
TB62201AFG 2005-04-04 17 electrical characteristics 1 (unless otherwise specified, ta = 25c, v dd = 5 v, v m = 24 v) characteristics symbol test circuit test condition min typ. max unit high v in (h) 2.0 v dd v dd + 0.4 input voltage low v in (l) 1 clk, reset , strobe, data pins gnd ? 0.4 gnd 0.8 v i in1 (h) ? ? 1.0 input current 1 i in1 (l) clk, strobe, data pins ? ? 1.0 a i in2 (h) ? ? 700 input current 2 i in2 (l) 2 reset , setup pins ? ? 700 a i dd1 v dd = 5 v (strobe, reset , data = l), reset = l, logic, output all off ? 3.0 6.0 power dissipation (v dd pin) i dd2 2 output open, f clk = 6.25 mhz logic active, v dd = 5 v, charge pump = charged ? 4.0 80 ma i m1 output open (strobe, reset , data = l), reset = l, logic, output all off charge pump = no operation ? 5.0 6.0 i m2 3 output open, f clk = 6.25 mhz logic active, v dd = 5 v, v m = 24 v, output off charge pump = charged ? 12 20 power dissipation (v m pin) i m3 4 output open, f clk = 6.25 mhz logic active, 100 khz chopping (emulation), output open, charge pump = charged ccp1 = 0.22 f, ccp2 = 0.01f ? 30 40 ma output standby current upper i oh v rs = v m = 24 v, v out = 0 v, reset = h, data = all l ? 400 ? ? output bias current upper i ob v rs = v m = 24 v, v out = 24 v, reset = h, data = all l ? 200 ? ? output leakage current lower i ol 5 v rs = v m = ccpa = v out = 24 v, reset = l ? ? 1.0 a high (reference) v rs (h) v ref = 3.0 v, v ref (gain) = 1/5.0 torque = (h.h) = 100% set ? 100 ? mid high v rs (mh) v ref = 3.0 v, v ref (gain) = 1/5.0 torque = (h.l) = 85% set 83 85 87 mid low v rs (ml) v ref = 3.0 v, v ref (gain) = 1/5.0 torque = (l.h) = 70% set 68 70 72 comparator reference voltage ratio low v rs (l) 6 v ref = 3.0 v, v ref (gain) = 1/5.0 torque = (l.l) = 50% set 48 50 52 % output current differential ? i out1 7 differences between output current channels i out = 1000 ma ? 5 ? 5 % output current setting differential ? i out2 7 i out = 1000 ma ? 5 ? 5 % rs pin current irs 8 vrs = 24 v, v m = 24 v, reset = l (reset status) ? ? 10 a
TB62201AFG 2005-04-04 18 characteristics symbol test circuit test condition min typ. max unit r on (d-s) 1 i out = 1.0 a, v dd = 5.0 v t j = 25c, drain-source ? 0.5 0.6 r on (d-s) 1 i out = 1.0 a, v dd = 5.0 v t j = 25c, source-drain ? 0.5 0.6 r on (d-s) 2 i out = 1.0 a, v dd = 5 v, t j = 105c, drain-source ? 0.6 0.75 output transistor drain-source on-resistance r on (d-s) 2 9 i out = 1.0 a, v dd = 5 v, t j = 105c, source-drain ? 0.6 0.75 ? electrical characteristics 2 (unless otherwise specified, ta = 25c, v dd = 5 v, v m = 24 v) characteristics symbol test circuit test condition min typ. max unit v ref input voltage v ref 10 v m = 24 v, v dd = 5 v, reset = h, output on 2.0 ? v dd v v ref input current i ref 10 reset = h, output off v m = 24 v, v dd = 5 v, v ref = 3.0 v 0 ? 100 a v ref attenuation ratio v ref (gain) 6 v m = 24 v, v dd = 5 v, reset = h, output on, v ref = 2.0 to v dd ? 1.0 v 1/4.8 1/ 5.0 1/5.2 ? tsd temperature t j tsd (note 1) 11 v dd = 5 v, v m = 24 v 130 ? 170 c tsd return temperature difference ? t j tsd 11 t j tsd = 130 to 170c ? t j tsd ? 35 ? c v dd return voltage v ddr 12 v m = 24 v, reset = h, strobe = h 2.0 ? 4.0 v v m return voltage v mr 13 v dd = 5 v, reset = h, strobe = h 2.0 ? 4.0 v over current protected circuit operation current i sd (note 2) 14 v dd = 5 v, v m = 24 v, fchop = 100 khz set ? 2.6 ? a note 1: thermal shut down (tsd) circuit when the ic junction temperature reache s the specified value and the tsd ci rcuit is activated, the internal reset circuit is activated switching the outputs of both motors to off. when the temperature is set between 130 (min) to 170c (max), the tsd circuit operates. when the tsd circuit is activated, the function dat a latched at that time are cleared. output is halted until the reset is released. while the tsd circuit is in operation, the char ge pump is halted. even if the tsd circuit is activated and reset goes h l h instantaneously, the ic is not reset until the ic junction temperature drops 35c (typ.) below the tsd operating temperature (hysteresis function). note 2: overcurrent protection circuit when current exceeding the specified value flows to the output, the internal reset circuit is activated switching the outputs of both shafts to off. when the isd circuit is activated, the functi on data latched at that time are cleared. until the reset signal is input, the overcurre nt protection circuit remains activated. during isd, the charge pump halts. for failsafe operation, be sure to add a fuse to the power supply.
TB62201AFG 2005-04-04 19 electrical characteristics 3 (ta = 25c, v dd = 5 v, v m = 24 v, i out = 1.0 a) characteristics symbol test circuit test condition min typ. max unit a = 90 ( 16) ? 100 ? a = 84 ( 15) ? 100 ? a = 79 ( 14) 93 98 ? a = 73 ( 13) 91 96 ? a = 68 ( 12) 87 92 97 a = 62 ( 11) 83 88 93 a = 56 ( 10) 78 83 88 a = 51 ( 9) 72 77 82 a = 45 ( 8) 66 71 76 a = 40 ( 7) 58 63 68 a = 34 ( 6) 51 56 61 a = 28 ( 5) 42 47 52 a = 23 ( 4) 33 38 43 a = 17 ( 3) 24 29 34 a = 11 ( 2) 15 20 25 a = 6 ( 1) 5 10 15 chopper current vector 15 a = 0 ( 0) ? ? 0 ? %
TB62201AFG 2005-04-04 20 ac characteristics (ta = 25c, v m = 24 v, v dd = 5 v, 6.8 mh/5.7 ? ) characteristics symbol test circuit test condition min typ. max unit clock frequency f clk 16 ? 1.0 ? 25 mhz t w (clk) 40 ? ? t wp (clk) 20 ? ? minimum clock pulse width t wn (clk) 16 ? 20 ? ? ns t strobe 40 ? ? t strobe (h) 20 ? ? minimum strobe pulse width t strobe (l) 16 ? 20 ? ? ns t susin-clk 20 ? ? data setup time t sust-clk 16 ? 20 ? ? ns t hsin-clk 20 ? ? data hold time t hclk-st 16 ? 20 ? ? ns t r ? 0.1 ? t f output load; 6.8 mh/5.7 ? ? 0.1 ? t plh (st) ? 15 ? t phl (st) strobe ( ) to vout output load; 6.8 mh/5.7 ? ? 10 ? t plh (cr) ? 1.2 ? output transistor switching characteristic t phl (cr) 18 cr to vout output load; 6.8 mh/5.7 ? ? 2.5 ? s noise rejection dead band time t blnk 19 i out = 1.0 a 200 300 400 ns cr reference signal oscillation frequency f cr 20 c osc = 560 pf, r osc = 3.6 k ? ? 736 ? khz chopping frequency range f chop (min) f chop (typ.) f chop (max) output active (i out = 1.0 a) step fixed, ccp1 = 0.22 f, ccp2 = 0.01 f 40 100 150 khz chopping frequency f chop 20 output active (i out = 1.0 a) cr clk = 800 khz ? 100 ? khz charge pump rise time t ong 21 ccp2 = 0.22 f, ccp = 0.01 f v m = 24 v, v dd = 5 v, reset = l h ? 2 4 ms
TB62201AFG 2005-04-04 21 test waveforms (timing waveforms and names) strobe cr waveform (reference) data clk output voltage a output voltage a 50% t sust-clk 50% t hclk-st t wn t wp t w (clk) t strobe 50% 50% data15 data0 t strobe (l) t hsin-clk t susin-clk t phl (cr) t phl (st) 50% 10% 90% t plh (cr) t plh (st) 50% 10% 90% 50% 10% 90% t r t f t strobe (h)
TB62201AFG 2005-04-04 22 test waveforms (timing waveforms and names) osc (cr) output voltage a output current 50% l fast osc-charge delay osc-fast delay output voltage a slow charge set current t chop 50% 50% h h l h l l
TB62201AFG 2005-04-04 23 calculation of set current determining r rs and v ref determines the set current value. i out (max) = (gain) v 1 ref v ref (v) ) ( ) ? = rs orque orque r data serial input : 50% 70, 85, 100, (t t 1/5.0 is v ref (gain): v ref attenuation ratio (typ.). for example, to input v ref = 3 v and torque = 100% and to output i out = 0.8 a, r rs = 0.75 ? (0.5 w or more) is required. formulas for calculating cr oscillation frequency (chopping reference frequency) the cr oscillation frequency and f chop can be calculated by the following formulas: f cr = c) kb r (c ka 1 [hz] ka (constant): 0.523 kb (constant): 600 f chop = 8 f cr [hz] example: when cosc = 1,000 pf and rosc = 2.0 k ? are connected, f cr = 735 khz. at this time, the chopping frequency f chop is: f chop = f cr /8 = 92 khz. note: f cr = cr t 1 charge) - (dis t (charge) t t cr + = cr oscillation cr charge cr distance cycle time time at this time, t (cr ? discharge) is subject to the following condition : 600 ns > t (cr ? discharge) > 400 ns. be sure to set the cr value in accordance with this condition.
TB62201AFG 2005-04-04 24 cr circuit constants osc circuit oscillation waveform the osc circuit generates the chopping reference signal by charging and discharging the external capacitor cosc through current supplied from the extern al resistor rosc in the osc block. voltages e1 and e2 in the diag ram are set by dividing the v dd by approximately 3/5 (e1) and 2/5 (e2). the actual current chopping time is 1/8 the cr frequency. [important: setting the cr circuit constants] the cr oscillation waveform is converted in the ic to the clk waveform (cr-clk signal) and used for control. if the cr waveform discharge time is set outside the range shown below, the operation of the ic is not guaranteed. be sure to set the cr waveform discharge time within the following range. 600 ns > t (cr discharge) > 400 ns e1 e2 t = 0 t = 1 t = 2 t (cr ? charge) t (cr ? dis-charge)
TB62201AFG 2005-04-04 25 ic power dissipation ic power dissipation is classified into two: power consumed by transistors in the output block and power consumed by the logic block and the charge pump circuit. (1) power consumed by the power transistor (calculated with r on = 0.6 ? ) in charge mode, fast decay mode, or slow decay mode, power is consumed by the upper and lower transistors of the h bridges. the following expr ession expresses the power consumed by the transistors of a h bridge. p (out) = 2 (t r ) i out (a) v ds (v) = 2 i out ^2 r on ......................................(1) the average power dissipation for output under 4 ? bit micro step operation (phase difference between phases a and b is 90 ) is determined by expression (1). thus, power dissipation for output per unit is dete rmined as follows (2) under the conditions below. r on = 0.6 ? (@ 1.0 a) i out (peak: max) = 1.0 a v m = 24 v v dd = 5 v p (out) = 2 (t r ) 1.0 (a)^2 0.60 ( ? ) ................................................................. (2) =1.20 (w) (2) power consumed by the logic block and im the following standard values are used as power di ssipation of the logic bloc k and im at operation. i (logic) = 2 ma (typ.): /unit i (im3) = 12.5 ma (typ.): operation/unit i (im1) = 6.0 ma (typ.): stop/unit the logic block is connected to v dd (5 v). im (total of current consumed by the circuits connected to v m and current consumed by output switching) is connected to v m (24 v). power dissipation is calculated as follows : p (logic & im) = 5 (v) 0.002 (a) + 24 (v) 0.0125 (a ) .................................... (3) = 0.31 (w) (3) thus, power dissipation for 1 unit (p) is determined as follows by (2) and (3) above. p = p (out) + p (logic & im) = 1.51 (w) power dissipation for 1 unit at standby is determined as follows: p (standby) = 24 (v) 0.006 (a) + 5 (v) 0.002 (a) = 0.154 (w) when one motor driving = 100 %, power dissipation is determined as follows: p (all) = 1.51 (w) + 1.664 (w) = 1.66 (w) for thermal design on the board, evaluate by mounting the ic.
TB62201AFG 2005-04-04 26 mixed decay mode waveforms (concept of mixed decay mode) in decay modes 1 to 4, any point from a to h can be set using 3-bit + 1-bit serial data 4. (slow decay mode for decay mode 0 in the above figure can be set by setting current decay mode x to 0.) nf is the point where the output curr ent reaches the set current value. rnf is the timing for monitoring the set current. in mixed decay and fast decay modes, where the condition rnf (set current monitor signal) < (output current) applies, charge mode is cancelled at th e next chopping cycle (charge cancel circ uit). therefore, at the next chopping cycle, the ic enters slow + fast modes (slow fast at mdt). nf f chop slow decay mode cr pin input waveform nf set current value rnf decay mode 0 37.5% mixed decay mode rnf set current value decay mode 1 75% mixed decay mode rnf set current value mdt nf decay mode 2 fast decay mode rnf set current value decay mode 3 100% 75% 50% 25% 0 mdt slow charge charge slow fast monitoring set current value charge fast charge nf fast 87.5% 62.5% 37.5% 12.5% a b c d e f g h i monitoring set current value monitoring set current value
TB62201AFG 2005-04-04 27 mixed decay timing which can be set nf 0% defaults for decay mode 0 current mode (x) = 0 decay mode (x ? 2, x ? 1, x ? 0) = ( , , ) x: arbitrary value nf 12.5% current mode (x) = 1 decay mode (x ? 2, x ? 1, x ? 0) = (0, 0, 0) mdt rnf nf 25% current mode (x) = 1 decay mode (x ? 2, x ? 1, x ? 0) = (0, 0, 1) mdt rnf nf 37.5% mdt rnf defaults for decay mode 1 current mode (x) = 1 decay mode (x ? 2, x ? 1, x ? 0) = (0, 1, 0) nf 50% current mode (x) = 1 decay mode (x ? 2, x ? 1, x ? 0) = (0, 1, 1) mdt rnf nf 62.5% current mode (x) = 1 decay mode (x ? 2, x ? 1, x ? 0) = (1, 0, 0) mdt rnf nf 75% rnf defaults for decay mode 2 current mode (x) = 1 decay mode (x ? 2, x ? 1, x ? 0) = (1, 0, 1) mdt nf 87.5% current mode (x) = 1 decay mode (x ? 2, x ? 1, x ? 0) = (1, 1, 0) rnf mdt nf fast decay mode rnf defaults for decay mode 3 current mode (x) = 1 decay mode (x ? 2, x ? 1, x ? 0) = (1, 1, 1) fast mode rnf: current monitor (when set current value > output current) charge mode fast mode f chop internal cr waveform
TB62201AFG 2005-04-04 28 test circuit (a/b unit only. c/d unit conforms to a/b unit.) 1. v in (h) , v in (l) test method v in (h) : set reset to high and vary the logic input voltage from 0 to 7 v. monitor i dd and measure the change point (v m = 24 v ). v in (l) : set reset to high and vary the logic input voltage from 5 to 0 v. monitor i dd and measure the change point. setup data r osc ab = 3.6 k ? 0.22 f ccp 1 0.01 f cr v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd 5 v c osc ab = 560 pf no reset at testing reset = 5 [v] 5 v 0 v 5 v 0 v 5 v 0 v a i dd1 , i dd2 0 v to 5 v vary v in . i in (h) , i in (l) r rs a r rs b a a data clk strobe h l 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 h l h l
TB62201AFG 2005-04-04 29 2. i in (h) , i in (l) , i dd1 , i dd2 (a/b unit only. c/d unit conforms to a/b unit.) test method i in (h) : set reset to high, set the the logic input voltag e to 5 v, and measure the input current. i in (h) : set reset to high, set the the logic input voltag e to 0 v, and measure the input current. i dd1 : apply v dd , input reset, and measure i dd . i dd2 : input 6.25 mhz clock and measure the current when the logic is operating. set output to open. setup data r osc ab = 3.6 k ? 0.22 f ccp 1 0.01 f cr v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd 5 v c osc ab = 560 pf no reset at testing reset = 5 [v] 5 v 0 v 5 v 0 v 5 v 0 v a i dd1 , i dd2 0 v to 5 v vary v in . i in (h) , i in (l) r rs a r rs b a a data clk strobe h l 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 h l h l
TB62201AFG 2005-04-04 30 3. im1, im2 (a/b unit only. c/d unit conforms to a/b unit.) test method im1: set the logic block to non-active (data = all 0), v dd = 5 v, v m = 24 v, and output to open. measure the current input from v m supply. reset = l im2: set the logic block only to active (clk = 6.25 mhz), v m = 24 v, and output to open. measure the current input from v m supply. reset = h setup data 5 v r osc = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd 5 v c osc = 560 pf at im1 testing: reset = l (0 v) at im2 testing: reset = h (5 v) 5 v 0 v 5 v 0 v 5 v 0 v a im data clk strobe h l 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 h l h l
TB62201AFG 2005-04-04 31 4. im3 (a/b unit only. c/d unit conforms to a/b unit.) this is the im current when all of the circuits, including the output transistors, in the ic are operating. the im current includes the current dissipation in the charge pump circuit, output gate loss, and output predriver. because the im current (im3) is inpu t from the rs pin, which is also used for the output current, im3 cannot be measured by the normal testing methods. use the method shown below. setup data the serial data phase signal (both a an d b) switch over to high or low. test method set output to open, change phase data from 1 0 1 0 and perform switching. when testing, input phase data at double the chopping frequency (if f chop = 100 khz, fdata = 200 khz) and measure the current value of v m supply. fdata = 200 khz means that the phase switches at 200 khz. 5 v r osc ab = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd 5 v c osc ab = 560 pf no reset at testing reset = 5 [v] 5 v 0 v 5 v 0 v 5 v 0 v a im 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 data clk strobe h l h l h l
TB62201AFG 2005-04-04 32 number of switchings at phase switching number of switchings at actual operation number of switchings at actual operation = 2 number of switchings at phase switching. therefore, switchin g the phase at 2 chopping cycle matches the number of switchings at actual operation with the number of switchings at phase switching, and allows the actual current dissipation, im3, to be measured. off off one phase switching (16-bit data input) four transistors switching to v m r rs load u 1 on u 2 l 1 on l 2 pgnd to v m r rs load u 1 u 2 l 1 l 2 pgnd switches by phase data off on off on four transistors are switched at one phase switching on on off off charge on on off off slow two transistors switching on on off off four transistors switching eight transistors switching in one chopping cycle mode changes three times in one chopping cycle. chopping cycle fast four transistors switching one phase switching (16-bit data input) two transistors switching
TB62201AFG 2005-04-04 33 5. i ob , i oh , i ol (a/b unit only. c/d unit conforms to a/b unit.) test method i oh : with v m = 24 v, v dd = 5 v, and logic input all = 0 applied, set reset = h, connect the output pins to gnd, and measure the supply current. i ob : with v m = 24 v, v dd = 5 v, and logic input all = 0 applied, set reset = h, connect the output pins to v m , and measure the supply current. i ol : with v m = 24 v, v dd = 5 v, and logic input all = 0 applied, set reset = l, connect the output pins to gnd, and measure the supply current. setup data i ol 5 v r osc = 3.6 k ? 0.22 f ccp 1 0.01 f i ob cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v a a i oh , i ol 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd 5 v c osc ab = 560 pf no reset at testing reset = 5 [v] 5 v 0 v 5 v 0 v 5 v 0 v data clk strobe h l 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 h l h l
TB62201AFG 2005-04-04 34 6. v rs (h to l), v ref (gain) (when measuring phase a) after measurement (a/b unit only. c/d unit conforms to a/b unit.) v rs (h to l): input torque data = 100% (hh) and vary the voltage between v m and r s pins. measure the voltage (v rs ) when output changes from fixed charge mode to another mode. also measure v rs when torque data = 85% (hl), 70% (lh), or 50% (ll) as above and calculate the ratio using v rs value at 100% as reference. v ref (gain) : v ref (gain) = ref rs v (*) v ((*) v rs : when torque data = 100%) setup data 5 v r osc ab = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd 5 v c osc ab = 560 pf no reset at testing reset = 5 [v] 5 v 0 v 5 v 0 v 5 v 0 v v oscilloscope vary between 0 and 1 v. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 data clk strobe h l h l h l
TB62201AFG 2005-04-04 35 7. ? i out1 , ? i out2 (a/b unit only. c/d unit conforms to a/b unit.) with l load, perform chopping in mixed decay mode . monitor the output current waveform and measure the various output currents at constant current operation. setup data 5 v r osc = 3.6 k ? 0.22 f ccp 1 0.01 f cr v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd 5 v c osc = 560 pf no reset at testing reset = 5 [v] 5 v 0 v 5 v 0 v 5 v 0 v r rs b r rs a monitors current waveform. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 set to 100% mdt output current value (set current value) data clk strobe h l h l h l current waveform 0% charge slow mdt 0% 100% fast charge slow fast measurement of peak current
TB62201AFG 2005-04-04 36 8. irs (when measuring phase a) (a/b unit only. c/d unit conforms to a/b unit) with l input to reset , connect v m and r rs to the power supply, and measure the current input to the r s pin. (either drop all the input pins to gnd level or input all low data to the data pin, then perform measurement. at that time, leav e all other output pins open.) setup data r osc = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd 5 v c osc = 560 pf reset = l a data clk strobe h l 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 h l h l
TB62201AFG 2005-04-04 37 9. r on (d-s) , r on (s-d) when measuring output a (a/b unit only. c/d unit conforms to a/b unit.) input the current setting data (hhhh signal) to th e data pin and measure the voltage between v m and out when i out = 1000 ma or the voltage between out and gnd. then, change the phase and repeat measurement. at that time, leave the ou tput pins which are not measured open. setup data (vary the phase data during testing.) 5 v r osc = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd sgnd 5 v c osc = 560 pf no reset at testing reset = 5 [v] 5 v 0 v 5 v 0 v 5 v 0 v curve tracer curve tracer data clk strobe h l 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 h l h l
TB62201AFG 2005-04-04 38 10. v ref , i ref (a/b unit only. c/d unit conforms to a/b unit.) v ref : vary v ref = 2 to v dd ? 1 v and confirm that output is on. i ref : when v m = 24 v and v dd = 5 v, apply the specified voltage of 3 v to the v ref and monitor the current flow value. 5 v r osc ab = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd 5 v c osc ab = 560 pf no reset at testing reset = 5 [v] r rs a oscilloscope a monitor i ref ( * ) vary v ref = 2 to v dd ? 1.0 v ( * ) when measuring i ref , fix v ref = 3 v and measure.
TB62201AFG 2005-04-04 39 11. t j tsd, ? t j tsd (measure in an environment such as an constant temperature chamber where the temperature for the ic can be freely changed) (a/b unit only. c/d unit conforms to a/b unit.) t j tsd : increase the ambient temperature. meas ure the temperature when output stops. ? t j tsd : gradually lower the temperature from the leve l when the tsd circuit wa s operating (output off). at that time, control the reset input thus : h l h l. output will begin at a certain temperature level. ? t j tsd is the difference between the temperature at which output begins and the temperature at which tsd is triggered. setup data 5 v r osc = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd sgnd 5 v c osc = 560 pf no reset at testing reset = 5 [v] 5 v 0 v 5 v 0 v 5 v 0 v curve tracer curve tracer data clk strobe h l 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 h l h l
TB62201AFG 2005-04-04 40 12. v ddr (a/b unit only. c/d unit conforms to a/b unit.) monitor the output pins. increase the v dd voltage from 0. measure the v dd value when output starts. next, decrease the v dd voltage and measure the v dd value when output stops. setup data 5 v r osc = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd c osc = 560 pf no reset at testing reset = 5 [v] r rs a oscilloscope v dd sgnd 5 v vary from 0 v. r rs b v m 3 v 5 v 0 v 5 v 0 v 5 v 0 v data clk strobe h l 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 h l h l
TB62201AFG 2005-04-04 41 13. v mr (a/b unit only. c/d unit conforms to a/b unit.) with the clk signal and data (all high) input, increase the v m voltage from 0. measure the v m value when output starts. next, decrease the v m voltage and measure the v m value when output stops. setup data 5 v r osc = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd c osc = 560 pf no reset at testing reset = 5 [v] r rs a oscilloscope vary from 0 v. r rs b 3 v 5 v 5 v 0 v 5 v 0 v 5 v 0 v data clk strobe h l 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 h l h l
TB62201AFG 2005-04-04 42 14. overcurrent protector circuit (isd) (to measure output a: ) (a/b unit only. c/d unit conforms to a/b unit.) test method: to monitor operating current of the overcurrent protector circuit when output a is short-circuited to the power supply input the current setting data (hhhh signal) to the data pin. if short-circuited to the supply, measure the lower output transistors. if short-circuited to gr ound, measure the upper outp ut transistors (see how to measure r on ). when measuring r on , increase the current flow. there is a current value at which output is switched off and r on cannot be measured. this value is the set curre nt value for the overcurr ent protector circuit. make sure to leave open the output pins not being measured. note that if the temperature changes, the value may fl uctuate. try to avoid applying power to the ic by one-shot measuring. setup data (example: the phase signal must be changed depending on the pin.) 5 v r osc ab = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd sgnd 5 v c osc ab = 560 pf at measuring, non-reset reset = 5 [v] 5 v 0 v 5 v 0 v 5 v 0 v curve tracer curve tracer data clk strobe h l 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 h l h l
TB62201AFG 2005-04-04 43 15. current vector (a/b unit only. c/d unit conforms to a/b unit.) perform chopping in mixed decay mode with load l. monitor the output current waveform and measure the output current at constant current operation. at this time, vary the 4-bit data for current setting and measure the current values. using the set output current as 100%, calculate the output current ratio. 100% 0% 100% (example) 71% output current 5 v r osc = 3.6 k ? 0.22 f ccp 1 0.01 f cr v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd 5 v c osc = 560 pf at measuring, non-reset reset = 5 [v] 5 v 0 v 5 v 0 v 5 v 0 v r rs b r rs a monitor current waveform
TB62201AFG 2005-04-04 44 16. f clk , t w (clk) , t wp (clk) , t wn (clk) , t strobe , t strobe (h) , t stobe (l) , t susin-clk , t sust-clk , t hsin-clk , t hclk-st (a/b unit only. c/d unit conforms to a / b unit.) input any data at f clk (max), perform chopping, and monitor the output waveform. for the measuring points, see the timing chart below. setup data measuring points 5 v r osc = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd c osc = 560 pf no reset at testing reset = 5 [v] r rs a r rs b 3 v 5 v 0 v 5 v 0 v 5 v 0 v 5 v t hin-clk clk strobe data 50% t susin-clk t strobe (l) t strobe (h) 50% 50% t sust-clk data15 50% t hst-clk data0 t wn (clk) t wp (clk) t w (clk) t strobe 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 data clk strobe h l h l h l
TB62201AFG 2005-04-04 45 17. osc-fast delay, osc-charge delay (a/b unit only. c/d unit conforms to a / b unit.) fix the output current value in mixed decay mode and turn the output on. measure the time until the output switches from the cr pin wavefo rm and the output voltage waveform. setup data 5 v r osc = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd 5 v c osc = 560 pf no reset at testing reset = 5 [v] 5 v 0 v 5 v 0 v 5 v 0 v r rs b r rs a data clk strobe h l 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 h l h l v out a v out a (mode) 50% 50% 50% 50% 50% 50% osc-charge delay osc-fast delay slow charge fast charge bottom top cr
TB62201AFG 2005-04-04 46 18. t phl (st) , t plh (st) , t r , t f (a/b unit only. c/d unit conforms to a/b unit.) setup data switch phase every 130 s and measure the output pin voltage and the strobe signal. [oscilloscope waveform (example)] 50% strobe output voltage a output voltage a 50% 50% t phl (st) 130 = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd 5 v c osc = 560 pf no reset at testing reset = 5 [v] 5 v 0 v 5 v 0 v 5 v 0 v r rs b monitor r l = 5.7 ? l = 6.8 mh 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 data clk strobe h l h l h l
TB62201AFG 2005-04-04 47 19. t brank (a/b unit only. c/d unit conforms to a/b unit.) t brank is the dead time band for avoiding malfunction caused by noise. appl y sufficient differential voltage (when v ref = 3 v, 0.6 v or higher) to v m -r s and apply duty. when the pulse width reaches a certain value, triggering feedback and chan ging the output. check the value. setup data r rs a 5 v r osc ab = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd ab 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd 5 v c osc ab = 560 pf no reset at testing reset = 5 [v] r rs b 5 v 0 v 5 v 0 v 5 v 0 v sgnd apply pulse to the r s pin so that the r s pin = v m voltage ? 1.0 v. v m r s pin voltage output operation h l measure the pulse width where output changes. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 data clk strobe h l h l h l
TB62201AFG 2005-04-04 48 20. f chop (f chop (min), f c hop (max)) (a/b unit only. c/d unit conforms to a/b unit.) change the r osc and c osc values and measure the frequency on the cr pin using the oscilloscope. at this time, 1/8 of the frequency of the measured cr waveform is f chop . oscilloscope waveform (example) r rs a r osc ab = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd 5 v c osc ab = 560 pf r rs b oscilloscope 1/8 f chop (sync) = f cr t = 0 t = 1
TB62201AFG 2005-04-04 49 21. t ong (a/b unit only. c/d unit conforms to a/b unit.) apply v m and v dd and change reset from l to h. measure the time until the ccpa pin becomes v m + v dd 90%. r rs a 5 v r osc = 3.6 k ? 0.22 f ccp 1 0.01 f cr ab v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd 6 setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd 5 v c osc = 560 pf at measuring, change from reset to non-reset. r rs b 5 v 0 v 5 v 0 v 5 v 0 v t ong 50% v m 5 v 0 v reset v dd + v m (v m + v dd ) 90%
TB62201AFG 2005-04-04 50 22. mixed decay timing (a/b unit only. c/d unit conforms to a/b unit.) with v m = 24 v, v dd = 5 v, reset = h, change the setup pin from l to h and overwrite the mixed decay timing table. then change the setup pin from h to l. with load l, perform chopping and monitor the output current waveform at that time. confirm that the switching timing from slow decay mode to fast decay mode within an fchop cycle is the specified mixed decay timing. (depending on the load l value and the test environm ent, chopping may be performed every two cycles or there may be no slow decay mode. if so, conditions, fo r example, load condition, may need to be changed. r rs a 5 v r osc = 3.6 k ? 0.22 f ccp 1 0.01 f cr v ref ab 8 9 5 b 2 b 35 a 32 a 34 r rs a 36 v m a data ab 29 clk ab 30 strobe ab 31 v dd 27 3 r rs b 1 v m b v ss (f in ) 13 ccp c 12 ccp b 7 ccp a reset 28 p-gnd setup sgnd 3 v 24 v : pgnd : sgnd (v ss ) ccp 2 sgnd sgnd v dd sgnd 5 v c osc = 560 pf r rs b 5 v 0 v 5 v 0 v 5 v 0 v at measuring, non-reset reset = 5 [v] 5 v 6 when overwriting the mixed decay timing table, set to 5 v. when the motors are operating, set to gnd level. output current value (set current value) mdt mdt mdt 100% 0% mdt 0% charge charge slow slow fast fast current waveform
TB62201AFG 2005-04-04 51 waveforms in various current modes (ideal waveform) normal mixed decay mode waveform when nf is after mixed decay timing f chop f chop nf nf rnf set current value mdt (mixed decay timing) point nf is the point at which the output current reaches the set current value. cr clk signal i out set current value 12.5% mixed decay mode rnf nf set current value i out set current value 37.5% mixed decay mode fast decay mode after charge mode. mdt (mixed decay timing) point rnf nf strobe signal input
TB62201AFG 2005-04-04 52 in mixed decay mode, when the output current > the set current value fast decay mode waveform set current value set current value rnf strobe signal input i out fast decay mode (0% mixed decay mode) f chop response delay time nf is the point at which the output current reaches the set current value. because the set current value > the output current, fast decay mode in the next cycle, too rnf nf rnf because the set current value > the output current, charge mode nf fast decay mode in the next cycle, too nf set current value mdt (mixed decay timing) point set current value nf rnf nf rnf strobe signal input i out 12.5% mixed decay mode f chop f chop f chop f chop charge mode for one f chop cycle after strobe signal input rnf because the set current value > the output current, no charge mode in the next cycle.
TB62201AFG 2005-04-04 53 strobe signal, internal cr clk, and output current waveform (when strobe signal is input in slow decay mode) when strobe signal is input, the chopping counter (cr-clk counter) is forced to reset at the next cr-clk timing. because of this, compared with a method in which the counter is not reset, response to the input data is faster. (the delay time, the theoretical value in the logic po rtion, is expected to be a one-cycle cr waveform: 1.25 s @ 100 khz chopping.) when the c-clk counter is reset due to strobe signal input, charg e mode is entered momentarily due to current comparison. note: in fast decay mode, too, charge mode is entered momentarily due to current comparison. mdt rnf nf set current value set current value strobe signal input i out f chop f chop f chop 37.5% mixed decay mode mdt rnf momentarily enters charge mode reset cr-clk counter here
TB62201AFG 2005-04-04 54 strobe signal, internal cr clk, and output current waveform (when strobe signal is input in charge mode) mdt set current value i out f chop f chop f chop set current value strobe signal input nf rnf mdt rnf momentarily enters charge mode 37.5% mixed decay mode
TB62201AFG 2005-04-04 55 (when strobe signal is input in fast decay mode) f chop f chop f chop strobe signal input momentarily enters charge mode 37.5% mixed decay mode nf mdt mdt nf mdt rnf rnf set current value i out set current value
TB62201AFG 2005-04-04 56 (when phase signal is input) set current value i out f chop f chop f chop set current value strobe signal input nf rnf mdt rnf 37.5% mixed decay mode nf 0
TB62201AFG 2005-04-04 57 (when current point 0 control is included) (2) set current value i out f chop f chop f chop set current value strobe signal input (1) 37.5% mixed decay mode reset cr-clk counter here reset cr-clk counter here 0 (1) (1) (2) (1)
TB62201AFG 2005-04-04 58 (when fast decay mode is included during the sequence) f chop fast decay mode f chop f chop f chop f chop 37.5% mixed decay mode set current value set current value
TB62201AFG 2005-04-04 59 (when slow decay mode is included during the sequence) f chop f chop f chop f chop f chop f chop 37.5% mixed decay mode slow decay mode f chop set current value set current value 37.5% mixed decay mode strobe in slow decay mode, depending on the load, the set current cannot be accurately traced. therefore, do not use slow decay mode.
TB62201AFG 2005-04-04 60 current modes (mixed ( = slow + fast) decay mode effect) ? sine wave in increasing (slow decay mode (charge + slow + fast) normally used) ? sine wave in decreasing (when using mixed deca y mode with large attenuation ratio (mdt%) at attenuation) ? sine wave in decreasing (when using mixed deca y mode with small attenuation ratio (mdt%) at attenuation) note: the above charts are schematics. the act ual current transient responses are curves. set current value slow charge charge fast slow fast charge fast charge fast slow slow set current value charge slow set current value set current value charge charge charge fast fast fast fast slow because current attenuates slowly, it takes a long time for the current to follow the set current value (or the current does not follow). set current value slow charge fast slow charge fast slow slow fast fast charge set current value because current attenuates so quickly, the current immediately follows the set current value.
TB62201AFG 2005-04-04 61 output transistor operating mode output transistor operation functions clk u 1 u 2 l 1 l 2 charge on off off on slow off off on on fast off on on off note: the above table is an example where current flows in the direction of the arrows in the above figures. when the current flows in the opposite direction of the arrows, see the table below. clk u 1 u 2 l 1 l 2 charge off on on off slow off off on on fast on off off on to v m r rs load u 1 u 2 l 1 l 2 pgnd (note) r s pin charge mode (charges coil power) to v m r rs load u 1 u 2 l 1 l 2 pgnd (note) r s pin slow mode (slightly attenuates coil power) to v m r rs load u 1 u 2 l 1 l 2 pgnd (note) r s pin fast mode (drastically attenuates coil power)
TB62201AFG 2005-04-04 62 output transistor operating mode 2 (sequence of mixed decay mode) the constant current is controlled by changing mode from charge slow fast. to v m r rs u 1 u 2 l 1 l 2 pgnd to v m r rs u 1 u 2 l 1 l 2 pgnd to v m r rs u 1 u 2 l 1 l 2 pgnd output voltage a h l h l set current l 50% 50% charge mode slow mode fast mode 50% out a out a out a out a out a out a output voltage a ouput current
TB62201AFG 2005-04-04 63 current discharge path when current data = 0000 are input during operation in slow decay mode, when all output transistors are forced to switch off, coil energy is discharged in the following modes : note: parasitic diodes are located on dotted lines. in no rmal mixed decay mode, the current does not flow to the parasitic diodes. however, when signal 0000 is in put during operation, the current flows to them. as shown in the figure at right, an output transistor has parasitic diodes. to discharge energy from the coil, each transistor is switched on allowing curr ent to flow in the reverse direction to that in normal operation. as a result , the parasitic diodes are not used. if all the output transistors are forced to switch off, the energy of the coil is discharged via the parasitic diodes. to v m r rs load u 1 u 2 l 1 l 2 pgnd (note) to v m r rs load u 1 u 2 l 1 l 2 pgnd (note) to v m power supply load u 1 u 2 l 1 l 2 pgnd (note) r s pin r s pin r s pin off off on on on on off off charge mode slow decay mode forced off mode off off off off input current data = 0000
TB62201AFG 2005-04-04 64 pd ? ta (package power dissipation) ambient temperature ta ( c) p d ? ta power dissipation p d (w) 0 0 25 50 75 125 150 100 0.5 1.0 1.5 2.0 2.5 3.0 3.5 (1) (2) (1) r th (j-a) ic only (96c/w) (2) when mounted on the board (38 c/w) board size (100 mm 200 mm 1.6 mm) * r th (j-c) : 8.5c/w
TB62201AFG 2005-04-04 65 power supply sequence (recommended) note 1: if the v dd drops to the level of the v ddr or below while the specifie d voltage is input to the v m pin, the ic is internally reset. this is a protective meas ure against malfunction. likewise, if the v m drops to the level of the v mr or below while regulation voltage is input to the v dd , the ic is internally reset as a protective measure against malfunction. to av oid malfunction, when turning on v m or v dd , we recommend you input the reset signal at the above timing. it takes time for the output control charge pu mp circuit to stabili ze. wait up to t ong time after power on before driving the motors. note 2: when the v m value is between 3.3 to 5.5 v, the internal re set is released, thus output may be on. in such a case, the charge pump cannot drive stably because of insufficient volt age. we recommend the reset state be maintained until v m reaches 20 v or more. note 3: since v dd = 0 v and v m = voltage within the rating are applied, output is turned off by internal reset. at that time, a current of several ma flows due to the pass between v m and v dd . v dd (max) v dd (min) v ddr gnd v m v m (min) v mr gnd non- reset reset h l reset v dd v m internal reset reset input ?.. * takes up to t ong until operable. non-operable area t
TB62201AFG 2005-04-04 66 relationship between v m and v h v h is the voltage of the ccpa pin. it is the highest voltage in this ic (power supply for driving the upper gate of the h bridge). z vcharge up is the voltage to boost v m to v h . usually equivalent to v dd . v m ? v h (& v charge up ) supply voltage v m (v) v h voltage, charge up voltage, v m voltage (v) 0 10 20 30 40 50 0 5 10 15 20 25 30 35 40 vmr recommended operation area usable area maximum input reset ( reset = 0 v) v h voltage charge up voltage v m voltage v dd = 5 v ccp1 = 0.22 f ccp2 = 0.02 f v h = v dd + v m (ccpa)
TB62201AFG 2005-04-04 67 operation of charge pump circuit z initial charging (1) when reset is released, t r1 is turned on and t r2 turned off. ccp2 is charged from ccp2 via di1 (this is the same as when tsd and isd are operat ing and the ic is restored from reset state.) (2) t r1 is turned off, t r2 is turned on, and ccp1 is charged from ccp2 via di2. (3) when the voltage difference between v m and v h (ccpa pin voltage = charge pump voltage) reaches v dd or higher, operation halts (steady state: because the capacitor is naturally discharged, the ic is continually charging to the capacitor). z actual operation (4) ccp1 charge is used at fchop sw itching and the vh potential drops. (5) charges up by (1) and (2) above. output switching normal state initial charging v h v m charge pump voltage t (2) (1) (3) (4) (5) (4) (5) 1/18/19/36 3/16/21/34 comparator & controller di3 r 1 ccpc ccp2 = 0.01 f v z ccp1 = 0.22 f t r1 t r2 i2 v m = 24 v output h switch output di2 di1 ccpb i1 v h v m r s v dd = 5 v ccpa (2) (1) (2) v h = v m + v dd = charge pump voltage i1 = charge pump current i2 = gate block power dissipation 12 7 13 r rs 27
TB62201AFG 2005-04-04 68 external capacitors for charge pumps when v dd = 5v, fchop = 100 khz, and l = 10 mh is driven with v m = 24 v, i out = 1100 ma, the theoretical values for ccp1 and ccp2 are as shown below: combine ccp1 and ccp2 as shown in the shaded area in the above graph. select values 10: 1 or more for ccp1: ccp2. when making a setting, evaluate properly and set values with a margin. 0.05 0.04 0.03 0.02 0.01 0 0 0.1 0.2 0.3 0.4 0.5 recommended value recommended area usable area ccp1 = (ng) ccp2 = (ok) ccp1 capacitance ( f) ccp1 ? ccp2 ccp2 capacitance ( f)
TB62201AFG 2005-04-04 69 charge pump rise time t ong : time taken for capacitor ccp2 (charging capacitor) to fill up ccp1 (capacitor used to save charge) to v m + v dd after a reset is released. the internal ic cannot drive the gates corr ectly until the voltage of ccp1 reaches v m + v dd . be sure to wait for t ong or longer before driving the motors. basically, the larger the ccp1 capa citance, the longer the initial ch arge-up time but the smaller the voltage fluctuation. the smaller the ccp1 capacitance, the shorter the initial charge-up time but the larger the voltage fluctuation. depending on the combination of capacitors (espec ially with small capacitance), voltage may not be sufficiently boosted. thus, use th e capacitors under the capacitor combination conditions (ccp1 = 0.22 f, ccp2 = 0.01 f) recommended by toshiba. v dd + v m (v m + v dd ) 90% v m 5 v 0 v 50% t ong reset
TB62201AFG 2005-04-04 70 operating time for overcu rrent protector circuit (isd non-sensitivity time and isd operating time) a non-sensitivity time is set for the overcurrent protector circuit to avoid misdetection of overcurrent due to spike current at irr or switching. the non-sensitivity time synchronizes with the freque ncy of the cr for setting th e chopping frequency. the non-sensitivity time is set as follows : non-sensitivity time = 4 cr cycle the time required for the isd to actually operat e after the no-sensitivity time is as follows : minimum: 5 cr cycle maximum: 8 cr cycle therefore, from the time overcurrent flows to the output transistors to th e time output halts is as follows. note that ideally, the operating time is the operating time when overcurrent flows. depe nding on the output control mode timing, the overcurrent protector circuit may not be triggered. therefore, to ensure safe op eration, add a fuse to the v m power supply for protection. the fuse capacity would vary according to the use conditions. however, select a fuse whose capacity avoids any operating problems and does not exc eed the power dissipation for the ic. point where overcurrent flows to output transistors (overcurrent status start) output halts (reset status) cr oscillation (basic chopping waveform) (non-sensitivity time) isd blank time min max isd operating time min max
TB62201AFG 2005-04-04 71 application operation input data (example: 2-phase excitation mode) torque 0 torque 1 decay b 0 decay b 1 b 0 b 1 b 2 b 3 phase b decay a decay a 0 a 0 a 1 a 2 a 3 phase a bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 1 1 1 0 1 1 1 1 1 1 0 1 1 1 1 1 2 1 1 1 0 1 1 1 1 0 1 0 1 1 1 1 1 3 1 1 1 0 1 1 1 1 0 1 0 1 1 1 1 0 4 1 1 1 0 1 1 1 1 1 1 0 1 1 1 1 0 data are input on the rising edge of cl k. every input of a data string (16-bit) requires input of the strobe signal. for the input conditions, see page 9, functions. we recommend mixed decay mode (37.5%) as decay mode. set torque to 100%. output current waveform of 2-phase excitation sine wave note: we recommended 2-phase excitation drive in 37.5% mixed decay mode. please refer to the caution of 2- phase excitation mode on next page. (%) 100 0 ? 100 phase b phase a
TB62201AFG 2005-04-04 72 application operation input data (example: 1-2 phase excitation mode typ. a) torque 0 torque 1 decay b 0 decay b 1 b 0 b 1 b 2 b 3 phase b decay a 0 decay a 1 a 0 a 1 a 2 a 3 phase a bit 0 1 2 3 4567 8 9 10 11 12 13 14 15 1 1 1 1 0 1111 1 1 0 1 1 1 1 1 2 1 1 1 0 1000 1 1 0 1 1 1 1 1 3 1 1 1 0 1111 1 1 0 1 1 1 1 1 4 1 1 1 0 1111 0 1 0 1 0 0 0 0 5 1 1 1 0 1111 0 1 0 1 1 1 1 0 6 1 1 1 0 1000 0 1 0 1 1 1 1 0 7 1 1 1 0 1111 0 1 0 1 1 1 1 0 8 1 1 1 0 1111 1 1 0 1 0 0 0 1 data are input on the rising edge of cl k. every input of a data string (16-bit) requires input of the strobe signal. for the input conditions, see page 10, functions. we recommend mixed decay mode (37.5%) as decay mode. set torque to 100%. when using this excitation mode, hi gh efficiency can be achieved by setting the phase data to 10% ( ? 10%). set current values in the order + 100% ? 10% ? 100% + 10%. output current waveform of 1-2 phase excitation sine wave (type. a) (%) 100 10 0 ? 10 ? 100 (%) 100 10 0 ? 10 ? 100 phase a phase b
TB62201AFG 2005-04-04 73 points for control that includes current of 0% in modes other than 2-phase excitation mode (from 1-2 ph ase excitation mode to 4w1-2 phase excitation mode), when the current is controlled to 0%, the tb62201 afg?s output transistor s are all turned off. at the time, the coil's energy returns to the power supply through the parasitic diodes. if the same current is applied several times and is within the rated current, then : the power consum ed by the on-resistance when current flows to the output mos will be less than the power cons umed when current is applied to the parasitic diodes. therefore, when controlling the current, rather than setting 0%, set the current to the next step beyond 0% (the minimum step in the reverse direction) for better power dissipation results. however, if the 0% (actually 10%) current cycle is long, the power dissipation may be greater than in off mode because of the need for constant-current control. therefore, toshiba recommend setting th e current according to the actual oper ating pattern. (1-2 phase excitation mode is the most effective.) flyback diode mode non-flyback diode mode output off period diode parasite constant- current control [%] 100 10 0 ? 10 ? 100 load to v m power supply u 2 off l 2 off r rs u 1 off l 1 off forced off mode pgnd charge r s pin the coil?s energy returns through the parasitic diodes. because v ds < v f , the power dissipation is large. constant- current control [%] 100 10 0 ? 10 ? 100 charge charge specifies a level of 10%, either side of 0. u 2 off off l 1 load to v m l 2 u 1 charge mode pgnd on on r s pin the coil?s energy returns through the mos, which is turned on. then the coil is charged to a level of 10%. the power dissipation is smaller than when the energy is returned via the parasitic diode. (however, the longer the 10% rated current control time, the longer the period of current dissipation.) r rs constant- current control constant- current control constant- current control
TB62201AFG 2005-04-04 74 application operation input data (example: 1-2 phase excitation mode typ.b) torque 0 torque 1 mdmb decay b b 0 b 1 b 2 b 3 phase b mdm a decay a a 0 a 1 a 2 a 3 phase a bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 1 1 1 0 1 1 1 1 1 1 0 0 0 0 0 1 2 1 1 1 0 0 0 0 1 1 1 0 0 0 0 1 1 3 1 1 1 0 0 0 0 0 1 1 0 1 1 1 1 1 4 1 1 1 0 0 0 0 1 0 1 0 0 0 0 1 1 5 1 1 1 0 1 1 1 1 0 1 0 0 0 0 0 0 6 1 1 1 0 0 0 0 1 0 1 0 0 0 0 1 0 7 1 1 1 0 0 0 0 0 0 1 0 1 1 1 1 0 data are input on the rising edge of cl k. every input of a data string (16-bit) requires input of the strobe signal. for the input conditions, see page 10, functions. we recommend mixed decay mode (37.5%) as decay mode. set torque to 100%. same as 1-2 phase excitation (typ. a) in the previous section, power dissipation can be reduced by changing 0% level to 10% or ? 10%. output current waveform of 1-2 phase excitation sine wave (typ. b) phase a (%) 100 0 ? 100 71 ? 71 phase b
TB62201AFG 2005-04-04 75 application operation input data (example: 4-bit micro steps) (2 bit micro steps = w1-2 phase excitation drive) torque 0 torque 1 decay b 0 decay b 1 b 0 b 1 b 2 b 3 phase b decay a 0 decay a 1 a 0 a 1 a 2 a 3 phase a bit 0 1 2 3 4567 8 9 10 11 12 13 14 15 1 1 1 1 0 1111 1 1 0 0 0 0 0 1 2 1 1 1 0 0011 1 1 0 0 0 1 0 1 3 1 1 1 0 0001 1 1 0 0 0 0 1 1 4 1 1 1 0 0010 1 1 0 0 0 1 1 1 5 1 1 1 0 0000 1 1 0 1 1 1 1 1 6 1 1 1 0 0000 0 1 0 1 1 1 1 1 7 1 1 1 0 0010 0 1 0 0 0 1 1 1 8 1 1 1 0 0001 0 1 0 0 0 0 1 1 9 1 1 1 0 0011 0 1 0 0 0 1 0 1 10 1 1 1 0 1111 0 1 0 0 0 0 0 1 11 1 1 1 0 1111 0 1 1 0 0 0 0 0 12 1 1 1 0 0011 0 1 1 0 0 1 0 0 13 1 1 1 0 0001 0 1 1 0 0 0 1 0 14 1 1 1 0 0010 0 1 1 0 0 1 1 0 15 1 1 1 0 0000 0 1 1 1 1 1 1 0 16 1 1 1 0 0000 1 1 0 1 1 1 1 0 17 1 1 1 0 0010 1 1 0 0 0 1 1 0 18 1 1 1 0 0001 1 1 0 0 0 0 1 0 19 1 1 1 0 0011 1 1 0 0 0 1 0 0 20 1 1 1 0 1111 1 1 0 0 0 0 0 0 data are input on the rising edge of cl k. every input of a data string (16-bit) requires input of the strobe signal. for the input conditions, see page 9, functions. we recommend slow decay mode in the ascending directio n of the sine wave; mixed decay mode (37.5%) in the descending direction. set torque to 100%.
TB62201AFG 2005-04-04 76 output current waveform of pseudo sine wave (2-bit micro steps) 5 micro-step from 0 to 90 drive is possible by combining current data (ab & cd) and phase data. for input current data at that time, see sectio n on current x in the list of the functions. depending on the load, the optimum condition changes for selecting mixed decay mode when the sine wave rises and falls. select the appropriate mixed decay timing according to the load. 100 0 (%) ? 100 ? 92 ? 71 ? 38 38 92 71 phase a step phase b
TB62201AFG 2005-04-04 77 application operation input data (example: 3-bit micro steps) (3 bit micro steps = 2w1-2 phase excitation drive) torque 0 torque 1 decay b 0 decay b 1 b 0 b 1 b 2 b 3 phase b decay a 0 decay a 1 a 0 a 1 a 2 a 3 phase a bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 1 1 1 0 1 1 1 1 1 1 0 0 0 0 0 1 2 1 1 1 0 0 1 1 1 1 1 0 0 1 0 0 1 3 1 1 1 0 0 0 1 1 1 1 0 0 0 1 0 1 4 1 1 1 0 0 1 0 1 1 1 0 0 1 1 0 1 5 1 1 1 0 0 0 0 1 1 1 0 0 0 0 1 1 6 1 1 1 0 0 1 1 0 1 1 0 0 1 0 1 1 7 1 1 1 0 0 0 1 0 1 1 0 0 0 1 1 1 8 1 1 1 0 0 1 0 0 1 1 0 0 1 1 1 1 9 1 1 1 0 0 0 0 0 1 1 0 1 1 1 1 1 10 1 1 1 0 0 0 0 0 0 1 0 1 1 1 1 1 11 1 1 1 0 0 1 0 0 0 1 0 0 1 1 1 1 12 1 1 1 0 0 0 1 0 0 1 0 0 0 1 1 1 13 1 1 1 0 0 1 1 0 0 1 0 0 1 0 1 1 14 1 1 1 0 0 0 0 1 0 1 0 0 0 0 1 1 15 1 1 1 0 0 1 0 1 0 1 0 0 1 1 0 1 16 1 1 1 0 0 0 1 1 0 1 0 0 0 1 0 1 17 1 1 1 0 0 1 1 1 0 1 0 0 1 0 0 1 18 1 1 1 0 1 1 1 1 0 1 0 0 0 0 0 1 19 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 20 1 1 1 0 0 1 1 1 0 1 1 0 1 0 0 0 21 1 1 1 0 0 0 1 1 0 1 1 0 0 1 0 0 22 1 1 1 0 0 1 0 1 0 1 1 0 1 1 0 0 23 1 1 1 0 0 0 0 1 0 1 1 0 0 0 1 0 24 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 25 1 1 1 0 0 0 1 0 0 1 1 0 0 1 1 0 26 1 1 1 0 0 1 0 0 0 1 1 0 1 1 1 0 27 1 1 1 0 0 0 0 0 0 1 1 1 1 1 1 0 28 1 1 1 0 0 0 0 0 1 1 0 1 1 1 1 0 29 1 1 1 0 0 1 0 0 1 1 0 0 1 1 1 0 30 1 1 1 0 0 0 1 0 1 1 0 0 0 1 1 0 31 1 1 1 0 0 1 1 0 1 1 0 0 1 0 1 0 32 1 1 1 0 0 0 0 1 1 1 0 0 0 0 1 0 33 1 1 1 0 0 1 0 1 1 1 0 0 1 1 0 0 34 1 1 1 0 0 0 1 1 1 1 0 0 0 1 0 0 35 1 1 1 0 0 1 1 1 1 1 0 0 1 0 0 0 36 1 1 1 0 1 1 1 1 1 1 0 0 0 0 0 0 data are input on the rising edge of cl k. every input of a data string (16-bit) requires input of the strobe signal. for the input conditions, see page 10, functions. we recommend slow decay mode in the ascending directio n of the sine wave; mixed decay mode (37.5%) in the descending direction. set torque to 100%.
TB62201AFG 2005-04-04 78 output current waveform of pseudo sine wave (3-bit micro steps) 9 micro-step from 0 to 90 drive is possible by combining current data (ab & cd) and phase data. for input current data at that time, see sectio n on current x in the list of the functions. depending on the load, the optimum condition changes for selecting mixed decay mode when the sine wave rises and falls. select the appropriate mixed decay timing according to the load. 100 0 [%] ? 100 step ? 83 ? 38 ? 20 38 83 71 ? 92 ? 98 ? 71 ? 56 20 56 98 phase a 92 phase b
TB62201AFG 2005-04-04 79 application operation input data (example: 4-bit micro steps) torque 0 torque 1 decay b 0 decay b 1 b 0 b 1 b 2 b 3 phase b decay a 0 decay a 1 a 0 a 1 a 2 a 3 phase a bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 1 1 1 0 1 1 1 1 1 1 0 0 0 0 0 1 2 1 1 1 0 1 1 1 1 1 1 0 1 0 0 0 1 3 1 1 1 0 0 1 1 1 1 1 0 0 1 0 0 1 4 1 1 1 0 1 0 1 1 1 1 0 1 1 0 0 1 5 1 1 1 0 0 0 1 1 1 1 0 0 0 1 0 1 6 1 1 1 0 1 1 0 1 1 1 0 1 0 1 0 1 7 1 1 1 0 0 1 0 1 1 1 0 0 1 1 0 1 8 1 1 1 0 1 0 0 1 1 1 0 1 1 1 0 1 9 1 1 1 0 0 0 0 1 1 1 0 0 0 0 1 1 10 1 1 1 0 1 1 1 0 1 1 0 1 0 0 1 1 11 1 1 1 0 0 1 1 0 1 1 0 0 1 0 1 1 12 1 1 1 0 1 0 1 0 1 1 0 1 1 0 1 1 13 1 1 1 0 0 0 1 0 1 1 0 0 0 1 1 1 14 1 1 1 0 1 1 0 0 1 1 0 1 0 1 1 1 15 1 1 1 0 0 1 0 0 1 1 0 0 1 1 1 1 16 1 1 1 0 1 0 0 0 1 1 0 1 1 1 1 1 17 1 1 1 0 0 0 0 0 1 1 0 1 1 1 1 1 18 1 1 1 0 0 0 0 0 0 1 0 1 1 1 1 1 19 1 1 1 0 1 0 0 0 0 1 0 1 1 1 1 1 20 1 1 1 0 0 1 0 0 0 1 0 0 1 1 1 1 21 1 1 1 0 1 1 0 0 0 1 0 1 0 1 1 1 22 1 1 1 0 0 0 1 0 0 1 0 0 0 1 1 1 23 1 1 1 0 1 0 1 0 0 1 0 1 1 0 1 1 24 1 1 1 0 0 1 1 0 0 1 0 0 1 0 1 1 25 1 1 1 0 1 1 1 0 0 1 0 1 0 0 1 1 26 1 1 1 0 0 0 0 1 0 1 0 0 0 0 1 1 27 1 1 1 0 1 0 0 1 0 1 0 1 1 1 0 1 28 1 1 1 0 0 1 0 1 0 1 0 0 1 1 0 1 29 1 1 1 0 1 1 0 1 0 1 0 1 0 1 0 1 30 1 1 1 0 0 0 1 1 0 1 0 0 0 1 0 1 31 1 1 1 0 1 0 1 1 0 1 0 1 1 0 0 1 32 1 1 1 0 0 1 1 1 0 1 0 0 1 0 0 1 33 1 1 1 0 1 1 1 1 0 1 0 1 0 0 0 1 34 1 1 1 0 1 1 1 1 0 1 0 0 0 0 0 1
TB62201AFG 2005-04-04 80 torque 0 torque 1 decay b 0 decay b 1 b 0 b 1 b 2 b 3 phase b decay a 0 decay a 1 a 0 a 1 a 2 a 3 phase a bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 35 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 36 1 1 1 0 1 1 1 1 0 1 1 1 0 0 0 0 37 1 1 1 0 0 1 1 1 0 1 1 0 1 0 0 0 38 1 1 1 0 1 0 1 1 0 1 1 1 1 0 0 0 39 1 1 1 0 0 0 1 1 0 1 1 0 0 1 0 0 40 1 1 1 0 1 1 0 1 0 1 1 1 0 1 0 0 41 1 1 1 0 0 1 0 1 0 1 1 0 1 1 0 0 42 1 1 1 0 1 0 0 1 0 1 1 1 1 1 0 0 43 1 1 1 0 0 0 0 1 0 1 1 0 0 0 1 0 44 1 1 1 0 1 1 1 0 0 1 1 1 0 0 1 0 45 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 46 1 1 1 0 1 0 1 0 0 1 1 1 1 0 1 0 47 1 1 1 0 0 0 1 0 0 1 1 0 0 1 1 0 48 1 1 1 0 1 1 0 0 0 1 1 1 0 1 1 0 49 1 1 1 0 0 1 0 0 0 1 1 0 1 1 1 0 50 1 1 1 0 1 0 0 0 0 1 1 1 1 1 1 0 51 1 1 1 0 0 0 0 0 0 1 1 1 1 1 1 0 52 1 1 1 0 0 0 0 0 1 1 0 1 1 1 1 0 53 1 1 1 0 1 0 0 0 1 1 0 1 1 1 1 0 54 1 1 1 0 0 1 0 0 1 1 0 0 1 1 1 0 55 1 1 1 0 1 1 0 0 1 1 0 1 0 1 1 0 56 1 1 1 0 0 0 1 0 1 1 0 0 0 1 1 0 57 1 1 1 0 1 0 1 0 1 1 0 1 1 0 1 0 58 1 1 1 0 0 1 1 0 1 1 0 0 1 0 1 0 59 1 1 1 0 1 1 1 0 1 1 0 1 0 0 1 0 60 1 1 1 0 0 0 0 1 1 1 0 0 0 0 1 0 61 1 1 1 0 1 0 0 1 1 1 0 1 1 1 0 0 62 1 1 1 0 0 1 0 1 1 1 0 0 1 1 0 0 63 1 1 1 0 1 1 0 1 1 1 0 1 0 1 0 0 64 1 1 1 0 0 0 1 1 1 1 0 0 0 1 0 0 65 1 1 1 0 1 0 1 1 1 1 0 1 1 0 0 0 66 1 1 1 0 0 1 1 1 1 1 0 0 1 0 0 0 67 1 1 1 0 1 1 1 1 1 1 0 1 0 0 0 0 68 1 1 1 0 1 1 1 1 1 1 0 0 0 0 0 0 data are input on the rising edge of cl k. every input of a data string (16-bit) requires input of the strobe signal. for the input conditions, see page 10, functions. in the above input data example, decay mode has a mixed decay mode (37.5%) setting for both the rising and falling direct ions of the sine wave, and a torque setting of 100%.
TB62201AFG 2005-04-04 81 4w1-2 output current waveform of pseudo sine wave (4-bit micro steps) 17 micro-step from 0 to 90 drive is possible by combining current data (ab & cd) and phase data. for input current data at that time, see sectio n on current x in the list of the functions. depending on the load, the optimum condition changes for selecting mixed decay mode when the sine wave rises and falls. select the appropriate mixed decay timing according to the load. ? 100 step ? 98 0 ? 96 ? 88 ? 92 ? 77 ? 71 ? 56 ? 63 ? 47 ? 38 ? 29 ? 20 ? 10 ? 83 10 20 29 38 47 56 63 71 77 83 88 92 96 98 100 [%] phase a phase b
TB62201AFG 2005-04-04 82 output current vector line 4w-1-2 phase excitation (4-bit micro steps) for data to be input, see the function of curre nt ax (bx) in the list of functions (10 page). 100 98 96 92 88 83 77 71 63 56 47 38 29 20 10 0 10 20 29 38 47 56 63 71 77 83 88 92 96 98 100 x x x = 0 x = 1 x = 2 x = 3 x = 4 x = 5 x = 6 x = 7 x = 8 x = 9 x = 10 x = 11 x = 12 x = 13 x = 14 x = 15 x = 16 i b (%) i a (%)
TB62201AFG 2005-04-04 83 output current vector line 2 (each mode: except 4w1-2 phase) i b (%) 1-2 phase excitation (typ. a) i a (%) 100 0 100 i b (%) 1-2 phase excitation (typ. b) i a (%) 100 0 100 71 i b (%) w 1-2 phase excitation i a (%) 100 0 100 71 38 71 92 92 38 i a (%) i b (%) 2w 1-2 phase excitation 98 100 0 100 71 38 71 92 92 38 20 20 56 83 98 56 83
TB62201AFG 2005-04-04 84 temperature characteristics depending on voltages between output transistor drain and source (v m = 24 v, v dd = 5 v) 0 100 1900 2000 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 200 300 400 500 600 700 800 900 1000 1100 1200 maximum rating ? 40c 0c 25c 85c 105c 105c (max) 25c (max) reference values 105c 85c 25c 0c ? 40c 25c max 105c max voltage between output transistor drain and source (mv) output current i out (ma)
TB62201AFG 2005-04-04 85 resistance characteristics depending on vo ltages output transistor drain and source (v m = 24 v, v dd = 5 v) (forward, reverse) the ic?s maximum rating is 1.5 a and recommended current is 1.2 a max. use the ic within this range. the on-resistance value fluctuates a ccording to temperature. pay particular attention to the temperature conditions when using. ? 1200 ? 1000 ? 800 ? 600 ? 400 ? 200 0 200 400 600 800 1400 1600 maximum rating 25c (max) 25c 25c max voltage between output stage drain and source (mv) output current i out (ma) ? 2000 1000 1200 ? 1800 ? 1600 ? 1400 ? 1200 ? 1000 ? 800 ? 600 ? 400 ? 200 0 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 3000 25c (reference values) maximum rating reference values
TB62201AFG 2005-04-04 86 recommended application circuit the values for the devices are all recommended values . for values under each input condition, see the above-mentioned recommended operating conditions. (example: f chop = 96 khz, cr: i out = 0.7 (a), lf: i out = 1.1 (a) ) note: we recommend the user add bypass capacitors as required. make sure as much as possible that gnd wiring has only one contact point. also, make sure that the vm pins are connected. for the data to be input, see the se ction on the recommended input data. because there may be shorts between ou tputs, shorts to supply, or shorts to ground, be careful when designing output lines, v dd (v m ) lines, and gnd lines. m r osc = 2.0 k ? c osc = 1000 pf v ref ab v m a r rs a a b a b r rs b v ss (f in ) strobe cd data cd clk cd reset p-gnd strobe ab data ab clk ab stepup v dd cr v ref ab 2.63 v 1 f sgnd r rs a 0.75 ? stepping motor 1 (cr: 6.8 mh/5.7 ? ) r rs b 0.75 ? sgnd sgnd sgnd 5 v 100 f ccp c ccp b ccp a ccp 2 0.015 f cop 1 0.22 f 24 v 100 f 5 v 0 v 5 v 0 v 5 v 0 v 5 v 0 v 5 v 0 v sgnd v m b 5 v 0 v 5 v 0 v 0 v m v mc r rs c c d c d r rs d r rs c 0.75 ? stepping motor 2 (lf: 6.8 mh/5.7 ? ) r rs d 0.75 ? v m d v ref cd 4.13 v 1 f sgnd 5 v
TB62201AFG 2005-04-04 87 example of 1-2 phase drive current (actual) waveform example of 4w 1-2 phase driv e current (actual) waveform t ch4 4 10.0 mv ? m1.00 ms ch4 8.0 mv 500 ma ? : 170 hz @: 218 hz test conditions v m = 34 v v dd = 5 v v ref = 3.75 v r rs = 0.5 ? cosc = 1000 pf rosc = 2.2 k ? f chop = 95 khz 37.5% mixed decay mode ta = 25c using 6.8 mh/5.7 ? , 1.8-degree, 200-step motor using toshiba test board100 ch4 4 10.0 mv ? m2.00 ms ch4 4.4 mv 500 ma ? : 102 hz @: 99 hz test conditions v m = 24 v v dd = 5 v v ref = 2.8 v r rs = 0.5 ? cosc = 1000 pf rosc = 2.2 k ? f chop = 95 khz 37.5% mixed decay mode ta = 25c using 6.8 mh/5.7 ? , 1.8-degree, 200-step motor using toshiba test board t
TB62201AFG 2005-04-04 88 package dimensions hsop36-p-450-0.65 unit: mm weight: 0.79 g (typ.)
TB62201AFG 2005-04-04 89 about solderability, following conditions were confirmed ? solderability (1) use of sn-63pb solder bath solder bath temperature = 230c dipping time = 5 seconds the number of times = once use of r-type flux (2) use of sn-3.0ag-0 .5cu solder bath solder bath temperature = 245c dipping time = 5 seconds the number of times = once use of r-type flux ? the information contained herein is subject to change without notice. ? the information contained herein is presented only as a guide for the applications of our products. no responsibility is assumed by toshiba for any infringements of patents or other rights of the third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of toshiba or others. ? toshiba is continually working to improve the quality an d reliability of its products. nevertheless, semiconductor devices in general can malfunction or fail due to their inhe rent electrical sensitivity and vulnerability to physical stress. it is the responsibility of t he buyer, when utilizing toshiba products , to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury or damage to property. in developing your designs, please ensure that toshiba products are used within s pecified operating ranges as set forth in the most recent toshi ba products specifications. also, pl ease keep in mind the precautions and conditions set forth in the ?handling guide for semicond uctor devices,? or ?toshiba semiconductor reliability handbook? etc.. ? the toshiba products listed in this document are inte nded for usage in general electronics applications (computer, personal equipment, office equipment, measuri ng equipment, industrial robotics, domestic appliances, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunc tion or failure of which may cause loss of human life or bodily injury (?unintended usage?). unintended usage include atomic energy control in struments, airplane or spaceship instruments, transportation instruments, traffic signa l instruments, combusti on control instruments, medical instruments, all types of safety devices, et c.. unintended usage of toshiba products listed in this document shall be made at th e customer?s own risk. ? the products described in this document are subject to the foreign exchange and foreign trade laws. ? toshiba products should not be embedded to the down stream products which are prohibited to be produced and sold, under any law and regulations. 030619eba restrictions on product use

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